This invention relates to a semiconductor device and more particularly to the structure of a power semiconductor module having a plurality of power devices mounted on a substrate and sealed in an insulating package.
As is well known, there are power semiconductor modules having power semiconductor switching devices, such as IGBTs, GTOs, or power transistors, sealed in insulating packages. Each of those power semiconductor modules is formed by laminating a base plate an internal heat sink plate for dispersing the heat generated in the semiconductor chips, and insulating plates for electrically insulating the semiconductor chips and the above-mentioned base plate in the module, and also by joining those plates with a solder or a brazing alloy. The final cooling of the power semiconductor modules is implemented by cooling fins or heat pipes attached to the base plate.
In a power semiconductor module structured as described, the temperature of the whole semiconductor module changes with the switching condition. Even in the power semiconductor module, temperature differences occur between the layers placed between the semiconductor chips and the support base plate. The life of the power semiconductor module is determined by a phenomenon that cracks due to the thermal fatigue attributable to the above-mentioned temperature change of whole module and temperature difference within the module occur in the solder or brazing material bonding the component parts together, so that the thermal resistance of the solder or the brazing material rises.
In order to extend the life of the power semiconductor module, JP-A-60-257141 proposes a structure in which the thermal stress buffer plates are thicker than the terminal plates in a semiconductor device having the insulating plates, terminal plates, thermal stress buffer plates, and semiconductor chips successively fixed to the metal base by solder.
On the other hand, JP-A-61-237456 discloses a structure in which the linear expansion coefficient and the Young's modulus of each internal heat sink plate are limited to certain values to thereby suppress the thermal fatigue of each solder layer in a semiconductor device having a semiconductor substrate is bonded to a metal substrate with interposition of an auxiliary metal substrate and an insulating plate.
In the above-mentioned technique, when the structure of the power semiconductor module is to be optimized with a view to prolonging the solder life, since the thickness of some internal heat sink plates is fixed, the optimization was not sought sufficiently in respect of the mutual relation of the thickness of the individual internal heat sink plates.
Although the life prediction is usually performed in the case of heat cycle test, it is not provided for the power semiconductor modules using different plate thicknesses in the case of working condition where a temperature difference occurs inside the semiconductor module by turning on and off of the semiconductor chips.